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These days, programmers go to a lot more trouble, e.g. They ran it under a debugger and single stepped it until the dongle code appeared. My recollection is that patching the dongles out of VL4 and XACT5 took somebody about 5 mins. The package (which I still have) supported XC2k, 3k and 4k). Also most FPGA projects can be done with a fast uC. It was OK if you were paid for your time, working for someone else, and didn't have to care whether the project could be maintained into the future.

I dropped out of FPGA design consultancy c. We were all young then PM me if you want to know more. There are also patching programs, dated 1998, for XACT 6. I know these cracks escaped into the wild and the above posts may be the same thing. For best results it needed an 8514-emulating video card then you got a nice 1024x768 display. It was never tested in a Windoze DOS box. The crack was done because later versions of Xilinx software would not import projects done with these, but when the dongles broke (they were flimsy parallel port ones) Xilinx refused to support the product, saying "no more dongles available". Both used its own dedicated dongle and these were patched by a Russian coder. I had that also but never found out how it worked, and never had the full VL4. There was also a program called sneaky.exe which Xilinx wrote which IIRC patched the schematic file so the full version of VL4 could open it. VL4/LCA was a Xilinx-special crippled version of VL4 (a £20k product back then) which would import only Xilinx component libs. There are cracked versions of Viewlogic 4 / LCA and XACT 5 out there. I used it mostly for ECL logic I could not measure. I think I still have an original dongle and most of the stuff in my basement, including an XC2064 eval board. Their price soared to unexpected heights when production finally stopped. That explains the need for extra dongles. You usually had a heap of Compaq-286s to run multiple incarnations of apr to increase the odds of having a routed chip the next morning that really worked. I don't think this will work on a virtual machine. The software contained ugly hacks, like going back from protected to real mode a dozen of times per second just to interrogate the real mode mouse driver. So easy that is was an insult to people who would probably have a logic analyzer. The exact number said if you had only Futurenet?, Design implementation or the simulator, too. You had to apply a certain number of clock pulses until PE got active. The usual early Xilinx dongle had an 8 bit counter whose carry-out was read back to paper_empty.